As DDR SDRAM increases in density and speed, so too do new challenges and opportunities appear. In the recent DDR5 update by JEDEC – as reported by Anandtech – we see not only a big speed increase from the previous maximum of 6800 Mbps to 8800 Mbps, but also the deprecation of Partial Array Self Refresh (PASR) due to security concerns, and the introduction of Per-Row Activation Counting (PRAC), which should help with row hammer-related (security) implications.
This is a companion discussion topic for the original entry at https://hackaday.com/2024/04/23/new-jedec-ddr5-memory-specification-up-to-8800-mt-s-anti-rowhammer-features/